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Since: Jul 06, 2005 Posts: 8
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(Msg. 1) Posted: Wed Jul 06, 2005 2:20 pm
Post subject: speedstep-centrino on dothan Archived from groups: linux>kernel (more info?)
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Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why shouldn't we
provide built-in tables for Dothan CPUs, too? Intel has released this
datasheet:
http://www.intel.com/design/mobile/datashts/302189.htm
with frequency/voltage pairs for every version of Dothan CPUs.
Moreover, I checked on Pentium M 725 and Pentium M 715 that the lowest
frequency at which the CPU can be set safely is not the 600MHz given in
datasheets, but 400MHz instead, with VID#A, VID#B, VID#C and VID#D (see
datasheet for more details) set to 0.908V.
I can provide a patch, let me know.
--
ciao
st3
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Since: Sep 28, 2005 Posts: 16
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(Msg. 2) Posted: Wed Jul 06, 2005 9:40 pm
Post subject: Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Hi,
On Wed, Jul 06, 2005 at 11:22:02AM +0200, st3 DeleteThis @riseup.net wrote:
> Currently, the speedstep-centrino support has built-in frequency/voltage
> pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> BIOS ACPI.
>
> But ACPI encoding may not be available or not reliable, so why shouldn't we
> provide built-in tables for Dothan CPUs, too? Intel has released this
> datasheet:
>
> http://www.intel.com/design/mobile/datashts/302189.htm
>
> with frequency/voltage pairs for every version of Dothan CPUs.
However, it is not known which one of VID#A, VID#B, VID#C or VID#D is to be
used on a specific system.
Dominik
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Since: Jan 07, 2005 Posts: 54
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(Msg. 3) Posted: Wed Jul 06, 2005 10:30 pm
Post subject: Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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st3.DeleteThis@riseup.net wrote:
> Currently, the speedstep-centrino support has built-in frequency/voltage
> pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> BIOS ACPI.
>
> But ACPI encoding may not be available or not reliable, so why shouldn't we
> provide built-in tables for Dothan CPUs, too? Intel has released this
> datasheet:
>
> http://www.intel.com/design/mobile/datashts/302189.htm
>
> with frequency/voltage pairs for every version of Dothan CPUs.
>
> Moreover, I checked on Pentium M 725 and Pentium M 715 that the lowest
> frequency at which the CPU can be set safely is not the 600MHz given in
> datasheets, but 400MHz instead, with VID#A, VID#B, VID#C and VID#D (see
> datasheet for more details) set to 0.908V.
>
> I can provide a patch, let me know.
Slower is better, and not depending on ACPI for anything which can be
gotten elsewhere is a good thing. Sounds like a good idea to me.
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Since: Jul 06, 2005 Posts: 129
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(Msg. 4) Posted: Wed Jul 06, 2005 11:20 pm
Post subject: Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Wed, Jul 06, 2005 at 03:58:53PM -0400, Bill Davidsen wrote:
> st3.RemoveThis@riseup.net wrote:
> >Currently, the speedstep-centrino support has built-in frequency/voltage
> >pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> >BIOS ACPI.
> >
> >But ACPI encoding may not be available or not reliable, so why shouldn't we
> >provide built-in tables for Dothan CPUs, too? Intel has released this
> >datasheet:
> >
> >http://www.intel.com/design/mobile/datashts/302189.htm
> >
> >with frequency/voltage pairs for every version of Dothan CPUs.
> >
> >Moreover, I checked on Pentium M 725 and Pentium M 715 that the lowest
> >frequency at which the CPU can be set safely is not the 600MHz given in
> >datasheets, but 400MHz instead, with VID#A, VID#B, VID#C and VID#D (see
> >datasheet for more details) set to 0.908V.
> >
> >I can provide a patch, let me know.
>
> Slower is better, and not depending on ACPI for anything which can be
> gotten elsewhere is a good thing. Sounds like a good idea to me.
This can't be done safely through any other means than ACPI right now.
It needs to know intimate things about which VID line is wired to what,
which is board specific.
Dave
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Since: Jul 06, 2005 Posts: 8
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(Msg. 5) Posted: Thu Jul 07, 2005 12:00 am
Post subject: Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Wed, 6 Jul 2005 16:06:53 +0200
Dominik Brodowski <linux DeleteThis @dominikbrodowski.net> wrote:
> Hi,
>
> On Wed, Jul 06, 2005 at 11:22:02AM +0200, st3 DeleteThis @riseup.net wrote:
> > Currently, the speedstep-centrino support has built-in frequency/voltage
> > pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> > BIOS ACPI.
> >
> > But ACPI encoding may not be available or not reliable, so why shouldn't we
> > provide built-in tables for Dothan CPUs, too? Intel has released this
> > datasheet:
> >
> > http://www.intel.com/design/mobile/datashts/302189.htm
> >
> > with frequency/voltage pairs for every version of Dothan CPUs.
>
> However, it is not known which one of VID#A, VID#B, VID#C or VID#D is to be
> used on a specific system.
Ok, so we could patch it in order to use acpi if available, and else use,
say, VID#C (every different VID is suitable for any system I tested so far;
moreover, voltages are very similar).
The safe choice is VID#A, the best one is VID#D =)
Another option: add a module_param for that, and make it configurable in
Kconfig whether to use ACPI tables or select between different VID profiles
through the parameter (not just for Banias, as of current version),
defaulting to VID#A.
anyway I will:
1) look for more specifications from Intel;
2) check VID setup on different systems (who can say that OEMs really use
them differently?).
Then, i found out that running CPU (in my case, Dothan 715) at 400MHz saves
lot of battery, really (on a Toshiba Satellite A50 with standard battery,
idling, 6h20 vs. 5h at 600MHz): it would be very nice to add support
for these frequencies to speedstep-centrino.
--
ciao
st3
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Since: Jul 06, 2005 Posts: 8
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(Msg. 6) Posted: Thu Jul 07, 2005 12:10 am
Post subject: Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Wed, 6 Jul 2005 17:11:59 -0400
Dave Jones <davej DeleteThis @redhat.com> wrote:
> This can't be done safely through any other means than ACPI right now.
> It needs to know intimate things about which VID line is wired to what,
> which is board specific.
I don't think it's related to 'which VID line is wired to what': this isn't
board specific, as it's given in datasheets provided by Intel (6 pins, etc).
The only issue is that there are four different versions of Dothan CPUs for
A1, A2, B0, B1, C0 steppings. There is only one version for C1 stepping. For
those different versions, Intel provides different typical voltage ranges.
For example, in read a post by Michael Clark in which he claims his IBM T42
has VID#A version of Dothan 745. I read ACPI tables on my laptop (Toshiba
Satellite A50, with Dothan 715) and I saw I got a VID#A version of Dothan
715 (is there somebody around with some other versions?).
Additionally, for lower frequencies VID#{A,B,C,D,E} voltages are the same.
So I ask: wouldn't it be good to find a way to add some lower frequencies,
while still reading ACPI tables for the other ones? Or to make profiles
configurable as a module parameter (as boot)? My problem isn't really ACPI,
but rather that one can't use lower and very useful frequencies.
Moreover, we could provide built-in tables for C1 stepping.
--
ciao
st3
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Since: Jul 07, 2005 Posts: 1
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(Msg. 7) Posted: Thu Jul 07, 2005 4:10 am
Post subject: Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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st3 DeleteThis @riseup.net wrote:
> Currently, the speedstep-centrino support has built-in frequency/voltage
> pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> BIOS ACPI.
>
> But ACPI encoding may not be available or not reliable, so why shouldn't we
> provide built-in tables for Dothan CPUs, too? Intel has released this
> datasheet:
>
> http://www.intel.com/design/mobile/datashts/302189.htm
>
> with frequency/voltage pairs for every version of Dothan CPUs.
>
> Moreover, I checked on Pentium M 725 and Pentium M 715 that the lowest
> frequency at which the CPU can be set safely is not the 600MHz given in
> datasheets, but 400MHz instead, with VID#A, VID#B, VID#C and VID#D (see
> datasheet for more details) set to 0.908V.
>
> I can provide a patch, let me know.
>
>
> --
> ciao
> st3
>
I looked into it 2 weeks ago, and i couldn't find a complete voltage
table for the Dothan C1 stepping (which my laptop has). I only found a
table with (IIRC) the max and min voltages for the max and min
frequencies. I also didn't understand the meaning of the different
VID#{A,B,C,D,E} values. Are these voltages related to the quality of the
power supply, or the quality of the processor? How do we know which one
to choose?
Regards,
--
Pedro Ramalhais
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Since: Jul 06, 2005 Posts: 129
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(Msg. 8) Posted: Thu Jul 07, 2005 10:20 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, Jul 07, 2005 at 10:00:27PM +0200, st3.DeleteThis@riseup.net wrote:
> Enabling, say, a duty cycle of 12.5% means that the CPU chip will be driven
> by clock just one time every eight, thus reducing power consumption and
> temperature (and it speeds down dramatically the CPU, too =).
>
> I tested it so far on my Pentium M Dothan 715 and on a Dothan 725.
>
> What do you think, could this be useful? I could provide a patch or a
> stand-alone module. Should I write an interface to sysfs?
You just reinvented the p4-clockmod driver
This hasn't been seen to save any power whatsoever that I've seen.
I've heard a few reports that it reduces heat for a few folks, but
betting on it increasing your battery life is probably a push.
Dave
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Since: Jul 06, 2005 Posts: 8
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(Msg. 9) Posted: Thu Jul 07, 2005 10:30 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, 7 Jul 2005 16:06:48 -0400
Dave Jones <davej.TakeThisOut@redhat.com> wrote:
> On Thu, Jul 07, 2005 at 10:00:27PM +0200, st3.TakeThisOut@riseup.net wrote:
> > Enabling, say, a duty cycle of 12.5% means that the CPU chip will be driven
> > by clock just one time every eight, thus reducing power consumption and
> > temperature (and it speeds down dramatically the CPU, too =).
> >
> > I tested it so far on my Pentium M Dothan 715 and on a Dothan 725.
> >
> > What do you think, could this be useful? I could provide a patch or a
> > stand-alone module. Should I write an interface to sysfs?
>
> You just reinvented the p4-clockmod driver
Oops. =)
> This hasn't been seen to save any power whatsoever that I've seen.
It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
while idling at 400MHz.
> I've heard a few reports that it reduces heat for a few folks, but
> betting on it increasing your battery life is probably a push.
Just a latest question: can be p4-clockmod used together with
speedstep-centrino? If not, would it make any sense to patch
speedstep-centrino to use this feature too?
--
ciao
st3
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Since: Jul 06, 2005 Posts: 8
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(Msg. 10) Posted: Thu Jul 07, 2005 10:40 pm
Post subject: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Pedro Ramalhais found another interesting thing in:
ftp://download.intel.com/design/Pentium4/manuals/25366816.pdf
that's the IA32_CLOCK_MODULATION (still called
MSR_IA32_THERM_CONTROL in include/asm-i386/msr.h, and I think this would
need a fix) register, that let set a reduced CPU duty cycle. So just today I
coded something to use it.
Just add to speedstep-centrino.c:
[yes I know, this isn't the Right Coding Style, but it's just to give an
idea of the whole thing]
static int sccm_level = 0;
module_param(sccm_level, uint, 0644);
MODULE_PARM_DESC(sccm_level, "Software Controlled Clock Modulation level: 0
for disabling, 7 for 12.5\% duty cycle");
in the first part, right after the third #define
and this function after centrino_target():
static int centrino_target_sccm ()
{
unsigned int msr, h;
rdmsr(MSR_IA32_THERM_CONTROL, msr, h);
msr &= (0<<1); msr &= (0<<2); msr &= (0<<3);
switch (sccm_level) {
case 0:
msr &= (0<<4);
case 1:
msr |= (1<<4); msr |= (1<<3); msr |= (1<<2);
msr |= (1<<1); break;
case 2:
msr |= (i<<4); msr |= (1<<3); msr |= (1<<2); break;
case 3:
msr |= (1<<4); msr |= (1<<3); msr |= (1<<1); break;
case 4:
msr |= (1<<4); msr |= (1<<3); break;
case 5:
msr |= (1<<4); msr |= (1<<2); msr |= (1<<1); break;
case 6:
msr |= (1<<4); msr |= (1<<2); break;
case 7:
msr |= (1<<4); msr |= (1<<1); break;
}
wrmsr (MSR_IA32_THERM_CONTROL, msr, h);
}
Then you'll just have to insmod speedstep-centrino.ko sccm_level=x, where x
can be 0 to disable software cycle control modulation, 1 to enable a
reduced duty cycle of 87.5%, 7 to enable a duty cycle of 12.5% and so on.
Enabling, say, a duty cycle of 12.5% means that the CPU chip will be driven
by clock just one time every eight, thus reducing power consumption and
temperature (and it speeds down dramatically the CPU, too =).
I tested it so far on my Pentium M Dothan 715 and on a Dothan 725.
What do you think, could this be useful? I could provide a patch or a
stand-alone module. Should I write an interface to sysfs?
--
ciao
st3
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Since: Jul 06, 2005 Posts: 129
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(Msg. 11) Posted: Thu Jul 07, 2005 10:50 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, Jul 07, 2005 at 10:22:25PM +0200, st3.DeleteThis@riseup.net wrote:
> > This hasn't been seen to save any power whatsoever that I've seen.
>
> It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
> while idling at 400MHz.
>
> > I've heard a few reports that it reduces heat for a few folks, but
> > betting on it increasing your battery life is probably a push.
>
> Just a latest question: can be p4-clockmod used together with
> speedstep-centrino? If not, would it make any sense to patch
> speedstep-centrino to use this feature too?
There was some discussion on cpufreq list long ago to make cpufreq
drivers stackable, but it's never been a high enough priority for
anyone to actually do the work.
Dave
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Since: Jul 07, 2005 Posts: 3
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(Msg. 12) Posted: Thu Jul 07, 2005 11:00 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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>Just a latest question: can be p4-clockmod used together with
>speedstep-centrino? If not, would it make any sense to patch
>speedstep-centrino to use this feature too?
I'm a little confused. How is this different from the ACPI CPU throttling
states (/proc/acpi/processor/CPUn/limit to set, throttling to see all
T-states available)?
On my 1.5-year-old Pentium-M, frequency scaling and T-states are different
beasties, and act entirely differently. I'm currently in the process of
rewriting my governor's brain to deal with the two more intelligently.
-Joseph
--
Joseph===============================================trelane@digitasaru.net
Graduate Student in Physics, Freelance Free Software Developer
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Since: Sep 28, 2005 Posts: 16
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(Msg. 13) Posted: Thu Jul 07, 2005 11:10 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
> >Just a latest question: can be p4-clockmod used together with
> >speedstep-centrino? If not, would it make any sense to patch
> >speedstep-centrino to use this feature too?
>
> I'm a little confused. How is this different from the ACPI CPU throttling
> states (/proc/acpi/processor/CPUn/limit to set, throttling to see all
> T-states available)?
T-states _tend_ to be utilized using chipset logic, while p4-clockmod is
done in-CPU.
> On my 1.5-year-old Pentium-M, frequency scaling and T-states are different
> beasties, and act entirely differently. I'm currently in the process of
> rewriting my governor's brain to deal with the two more intelligently.
In your case, I would care about throttling. In very most cases it actually
increases energy consumption, as the state being entered is technically the
same to ACPI C2 (IIRC), so it is only "forced" idling and only useful if
"forced" idling is needed to not need active cooling.
Dominik
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Since: Sep 28, 2005 Posts: 16
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(Msg. 14) Posted: Thu Jul 07, 2005 11:20 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, Jul 07, 2005 at 10:22:25PM +0200, st3 RemoveThis @riseup.net wrote:
> > This hasn't been seen to save any power whatsoever that I've seen.
>
> It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
> while idling at 400MHz.
Do you use ACPI-based idling? If so, in which state is the CPU in (cat
/proc/acpi/processor/*/power ? I suspect that you do not use ACPI (else
you wouldn't need the table-based approach) or that the ACPI-based idling is
broken on your notebook; as then the Linux idle handler only makes use of
"hlt" (IIRC), that is ACPI C1, while throttling "forces" ACPI C2 (again
IIRC).
Dominik
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Since: Jul 06, 2005 Posts: 8
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(Msg. 15) Posted: Thu Jul 07, 2005 11:30 pm
Post subject: Re: enhanced intel speedstep feature was Re: speedstep-centrino on dothan [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, 7 Jul 2005 23:10:33 +0200
Dominik Brodowski <linux.TakeThisOut@dominikbrodowski.net> wrote:
> Do you use ACPI-based idling? If so, in which state is the CPU in (cat
> /proc/acpi/processor/*/power ? I suspect that you do not use ACPI (else
> you wouldn't need the table-based approach) or that the ACPI-based idling is
> broken on your notebook; as then the Linux idle handler only makes use of
> "hlt" (IIRC), that is ACPI C1, while throttling "forces" ACPI C2 (again
> IIRC).
For idling, I didn't mean 'real idling', but instead just 'doing nothing'
in ACPI C1 state, that's simply a CPU usage < 1%.
Sorry for being so lame =)
--
ciao
st3
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| Related Topics: | Slowdown with randomize_va_space in 2.6.12.2 - Hi, all I have a bash script that calls a small application several times (around 50 calls) that just send and receives data through an already open tcp socket to a local server through the loopback device. It also launches another small app several....
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[PATCH 3/3] openfirmware: implement hotplug for macio devi.. - This patch adds the hotplug routine for generating hotplug events when devices are seen on the macio bus. It uses the attributed created by the sysfs nodes to generate the hotplug environment vars for userspace. Since the characters allowed inside the..
[PATCH] NFS: fix client hang due to race condition - The flags field in struct nfs_inode is protected by the BKL. The following two code paths (there may be more, but my test program only hits these two) modify the flags without obtaining the lock: nfs_end_data_update nfs_release ..
[PATCH 1/3] openfirmware: generate device table for usersp.. - This patch converts the usage of struct of_match to struct of_device_id, similar to pci_device_id. This allows a device table to be generated, which can be parsed by depmod(8) to generate a map file for module loading. In order for hotplug to work.... |
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